//THIS PROJECT DEVELOPED BY CORNELL ECE 3400 STAFF. PLEASE //DO NOT REUSE OR DISTRIBUTE THIS CODE WITHOUT PERMISSION //SPRING 2015 module blockArray ( CLOCK, INDEX, IN, W_EN, OUT ); input CLOCK; input [9:0] INDEX; //x&y coords input [1:0] IN; input W_EN; //write enable output [1:0] OUT; reg [1:0] array[1023:0]; reg [1:0] pre_out; //since out value is a wire always @(posedge CLOCK) begin if (W_EN == 1) begin //write value array[INDEX] <= IN; end pre_out <= (W_EN ? 2'b00 : array[INDEX]); end assign OUT = pre_out; endmodule