High Level Design

Organization

The basic program design flows from the keyboard denouncer.  By pressing C or D the user can increase or decrease the time per division on the scope.  Each press increases the calibration by one level (We used same levels as on the scopes in the lab ie. 50ms 20ms 10ms..).  By pressing A, the user initiates a a sampling cycle. The screen background with gridlines and labels is drawn and then Timer1 ISR is turned on with the appropriate compare match based on the time per division setting.  Each time Timer 1 triggers it reads in a sample and appends it to an array in memory.  It also updates some key registers used in calculating statistics such as Vpp and Vave. Note we could have added more functionality to Timer1 ISR, but we chose to keep it short and put the majority of our manipulations in the main code to avoid hard to find bugs and conflicts. We proceed to calculate Vpp and Vave.  Next we translate our voltage array into a number discrete levels so that it will map to the screen well.  A key part of this translation is a rounding we do by performing an integer division and then a multiplication and purposefully drop some less  significant bits.  We complete execution by drawing the waveform and some text labels and data to HyperTerminal using VT100 command codes for formating.

 

Block Diagram

 

Main