.global paint_mode paint_mode: /* DATA ADDRESSES (post-compiler) for convenience PORTA 0x02 PORTB 0x05 PORTC 0x08 PORTD 0x0B PINA 0x00 (unused) PINB 0x03 (unused) PINC 0x06 (unused) PIND 0x09 SCREEN 640 pixels wide 480 pixels tall RESOLUTION 255 visible 'dots' wide, with each dot 2 pixels wide 480 visible 'dots' tall, with each dot 1 pixel tall TIMING each clock cycle takes ~39.72 nS using a 25.175 MHz crystal each line takes exactly 800 clock cycles and thus ~31.77 uS per line each screen prints exactly 512 lines and thus ~16.27 mS per screen for a 61.46 Hz screen refresh rate PORT ASSIGNMENTS from most significant to least significant bits PORTA/PINA: SRAM_Addr[7:0] //pixel number PORTB/PINB: SRAM_Addr[17:16], SRAM_OE, SRAM_WE, RGB_OUTPUT[4:0] PORTC/PINC: SRAM_Addr[15:8] //line number PORTD/PIND: V_sync, H_sync, TriState_OE, PushBtn_INPUT, RGB_INPUT[4:0] REGISTER ASSIGNMENTS r16: temporary reg for cursor drawing loop or joystick motion, status stored on stack r17: 1 r18: temporary reg for cursor buffer and joystick input r19: temporary reg for cursor buffer r20: Brush_Color[3:0], sometimes output PORTB[3:0] r21: Joystick_Timer r22: Printing_Pixel[7:0], output PORTA[7:0] r23: Debounce_Timer r24: Cursor_Printing_Y[7:0] r25: Cursor_Printing_Y[8] r26: Cursor_Printing_X[7:0] r27: Cursor_X[7:0] r28: Cursor_Y[7:0] r29: Cursor_Y[8] r30: Printing_Line[7:0], output PORTC[7:0] r31: Printing_Line[8], output PORTB[16] */ // SAVE STATUS REGISTER in r16,0x3F //1 push r16 //2 out 0x02,r0 out 0x05,r0 out 0x08,r0 out 0x0B,r0 sbi 0x05,4 //active low SRAM_WE sbi 0x05,5 //active low SRAM_OE sbi 0x0B,5 //active low Tristate_EN sbi 0x0B,6 //active low V_sync sbi 0x0B,7 //active low H_sync ldi r17,1 ldi r20,0 ldi r21,0 ldi r23,0 ldi r27,0 ldi r28,0 ldi r29,0 nop RESTART_SCREEN: //9 cycles ldi r16,0 ldi r18,0 ldi r19,0 ldi r22,0 ldi r24,0 ldi r25,0 ldi r26,0 ldi r30,0 ldi r31,0 RESTART_LINE: //**************************************************************************************** // **** HORIZONTAL AND VERTICAL SYNC = 75 CYCLES //**************************************************************************************** //-------------------------------------------------------------------- // ---- TURN SYNCS LOW = 9 CYCLES //-------------------------------------------------------------------- //assert v_sync low at the beginning of the first line //assert h_sync low at the beginning of every line cp r30,r0 cpc r31,r0 brne SKIP_V_LOW cbi 0x0B,7 //2; VERTICAL SYNC LOW rjmp H_LOW //2 SKIP_V_LOW: nop nop nop H_LOW: cbi 0x0B,6 //2; HORIZONTAL SYNC LOW //-------------------------------------------------------------------- // ---- POLL JOYSTICK INPUTS = 57 CYCLES //-------------------------------------------------------------------- //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: BRANCH ON IF POLLING NECESSARY //:::::::::::::::::::::::::::::::::::::::::::::::: //poll the joystick during line 486 of every other screen //6 cycles if we are supposed to poll inputs now // since it is line 486 and an even screen, POLL_INPUTS //8 cycles if we are not supposed to poll inputs // since it is not line 486 or on odd screen, SYNC_WAIT cpi r30,230 //lower bits of 486 cpc r31,r17 brne SYNC_WAIT_TEMP //1/2 cp r21,r17 breq POLL_INPUTS //1/2 ldi r21,1 rjmp SYNC_WAIT //2 SYNC_WAIT_TEMP: nop nop rjmp SYNC_WAIT //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: TEST JOYSTICK DIRECTIONS = 37 CYCLES //:::::::::::::::::::::::::::::::::::::::::::::::: POLL_INPUTS: //3 cycles //poll joystick inputs and reset condition of cursor //moved register to un-moved until checking joystick in r18,0x09 ldi r16,0 ldi r21,0 //9 cycles //if UP motion detected, move cursor up //by decrementing cursor y position (r29:r28) //and indicating that the cursor moved (r16) mov r19,r18 ori r19,1 cp r18,r19 brne TEST_DOWN_1 //1/2 sbiw r28,1 //2 ldi r16,1 rjmp TEST_DOWN_2 //2 TEST_DOWN_1: nop nop nop nop TEST_DOWN_2: //9 cycles //if DOWN motion detected, move cursor down //by incrementing cursor y position (r29:r28) //and indicating that the cursor moved (r16) mov r19,r18 ori r19,2 cp r18,r19 brne TEST_LEFT_1 //1/2 adiw r28,1 //2 ldi r16,1 rjmp TEST_LEFT_2 //2 TEST_LEFT_1: nop nop nop nop TEST_LEFT_2: //8 cycles //if LEFT motion detected, move cursor left //by decrementing cursor x position (r27) //and indicating that the cursor moved (r16) mov r19,r18 ori r19,4 cp r18,r19 brne TEST_RIGHT_1 //1/2 sub r27,1 ldi r16,1 rjmp TEST_RIGHT_2 //2 TEST_RIGHT_1: nop nop nop TEST_RIGHT_2: //8 cycles //if RIGHT motion detected, move cursor right //by incrementing cursor x position (r27) //and indicating that the cursor moved (r16) mov r19,r18 ori r19,8 cp r18,r19 brne TEST_BUTTON_1 //1/2 add r27,1 ldi r16,1 rjmp TEST_BUTTON_2 //2 TEST_BUTTON_1: nop nop nop TEST_BUTTON_2: //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: TEST BUTTON DEBOUNCE = 14 CYCLES //:::::::::::::::::::::::::::::::::::::::::::::::: //test for state of button debounce machine cpi r23,1 //3(+11) cycles for CONFIRM_PRESS, state r23=1 breq CONFIRM_PRESS //1/2 cpi r23,3 //5(+9) cycles for CONFIRM_RELEASE, state r23=3 breq CONFIRM_RELEASE //1/2 cpi r23,2 //7(+7) cycles for WAIT_FOR_RELEASE, state r23=2 breq WAIT_FOR_RELEASE //1/2 //6(+8) cycles for WAIT_FOR_PRESS WAIT_FOR_PRESS: //8 cycles //if button press is sensed, proceed to CONFIRM_PRESS next time nop mov r19,r18 ori r19,16 //only bit4 asserted cp r18,r19 brne PROCEED_TO_SYNC_P //1/2 ldi r23,1 PROCEED_TO_SYNC_P: rjmp SYNC_READY //2 CONFIRM_PRESS: //11 cycles //if button press confirmed, proceed to CONFIRM_RELEASE next time //and also increment color (or reset to zero if overflow) //else return to WAIT_FOR_PRESS mov r19,r18 ori r19,16 //only bit4 asserted cp r18,r19 brne RESET_TO_WAIT_FOR_PRESS //1/2 ldi r23,2 add r20,r17 cpi r20,16 brne SYNC_READY_1 //1/2 ldi r20,0 SYNC_READY_1: rjmp SYNC_READY //2 RESET_TO_WAIT_FOR_PRESS: ldi r23,0 nop nop nop rjmp SYNC_READY //2 WAIT_FOR_RELEASE: //7 cycles //if button release is sensed, proceed to CONFIRM_RELEASE next time mov r19,r18 andi r19,239 //all but bit4 asserted cp r18,r19 brne PROCEED_TO_SYNC_R //1/2 ldi r20,3 PROCEED_TO_SYNC_R: rjmp SYNC_READY //2 CONFIRM_RELEASE: //9 cycles //if button release confirmed, proceed to WAIT_FOR_PRESS next time //else return to WAIT_FOR_RELEASE nop mov r19,r18 andi r19,239 //all but bit4 asserted cp r18,r19 brne RETURN_TO_WAIT_FOR_RELEASE //1/2 ldi r20,0 nop rjmp SYNC_READY //2 RETURN_TO_WAIT_FOR_RELEASE: ldi r20,2 rjmp SYNC_READY //2 //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: PREPARE FOR SYNC PULSE RETURN //:::::::::::::::::::::::::::::::::::::::::::::::: SYNC_WAIT: //49 cycles nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop SYNC_READY: //-------------------------------------------------------------------- // ---- RETURN SYNCS HIGH - 9 CYCLES //-------------------------------------------------------------------- //return v_sync high at the beginning of the third line //return h_sync high at the beginning of every line cpi r30,2 cpc r31,r0 brne SKIP_V_HIGH sbi 0x0B,7 //2; VERTICAL SYNC HIGH rjmp H_HIGH //2 SKIP_V_HIGH: nop nop nop H_HIGH: sbi 0x0B,6 //2; HORIZONTAL SYNC HIGH //**************************************************************************************** // **** BACK PORCH = 72 CYCLES //***************************************************************************************** nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop //**************************************************************************************** // **** RGB BODY = 532 or less CYCLES //***************************************************************************************** //-------------------------------------------------------------------- // ---- BRANCH ON LINE NUMBER //-------------------------------------------------------------------- //determine assigned operation for given horizontal line of screen cp r31,r17 //7 (=3+4) cycles VGA_LINES_000_255 brne VGA_LINES_000_255 //1/2 cpi r30,224 //low bits of 480 //7 (=5+2) cycles VGA_LINES_256_479 brlo VGA_LINES_256_479 //1/2 cpi r30,224 //low bits of 280 //29 (=7+22) cycles VGA_LINE_480 breq VGA_LINE_480 //1/2 cpi r30,230 //low bits of 486 //9 cycles VGA_LINES_481_485 brlo VGA_LINES_481_485 //1/2 cpi r30,230 //low bits of 286 //29 (=11+18) cycles VGA_LINE_486 breq VGA_LINE_486 //1/2 cpi r30,241 //low bits of 497 //15 =(13+2) cycles VGA_LINES_487_496 brlo VGA_LINES_487_496_TEMP //1/2 cpi r30,241 //low bits of 497 //29 (=15+14) cycles VGA_LINE_497 breq VGA_LINE_497 //1/2 cpi r30,252 //low bits of 508 //19 (=17+2) cycles VGA_LINES_498_507 brlo VGA_LINES_498_507_TEMP //1/2 cpi r30,252 //low bits of 508 //29 (=19+10) cycles VGA_LINE_508 breq VGA_LINE_508 //1/2 rjmp VGA_LINES_509_511 //2; //20 cycles VGA_LINES_509_511 VGA_LINES_487_496_TEMP: rjmp VGA_LINES_487_496 VGA_LINES_498_507_TEMP: rjmp VGA_LINES_498_507 //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: LINES 000-479 //:::::::::::::::::::::::::::::::::::::::::::::::: //even the clock cycles of paths that print lines to the screen //proceed to RGBS sequence that outputs lines to the screen //4 cycles for lines 000-255 //2 cycles for lines 256-479 VGA_LINES_000_255: nop nop VGA_LINES_256_479: rjmp PROCEED_TO_RGB //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: LINES 480,486,497,508 //:::::::::::::::::::::::::::::::::::::::::::::::: //even the clock cycles of paths that store cursor coordinates in //temporary, modifiable registers and proceed to no operation //store top-left pixel for all drawing operations, except //for filling center of cursor which is shifted 1-right, 2-down VGA_LINE_480: //22 cycles nop nop nop nop VGA_LINE_486: //18 cycles nop nop nop nop VGA_LINE_497: //14 cycles nop nop nop nop VGA_LINE_508: //10 cycles mov r24,r28 mov r25,r29 mov r26,r27 cpi r30,252 //low bits of 508 brne SKIP_1x2_PIXEL_SHIFT add r26,r31 adiw r24,2 //2 rjmp NOPS_FROM_LINE_480X //2 SKIP_1x2_PIXEL_SHIFT: nop nop rjmp NOPS_FROM_LINE_480X //2 //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: LINES 481-485 - 387 CYCLES, 5 times/screen //:::::::::::::::::::::::::::::::::::::::::::::::: //overwrite pixels covered by cursor in foreground //image stored in SRAM_Addr[17]=0 with the pixels //stored in cursor position in background image //stored in SRAM_Addr[17]=1, overwriting one column //of 10 pixels per line and one pixel per loop iteration VGA_LINES_481_485: //3 cycles //set consistent address bits for row and declare loop variable ldi r19,176 //10110000 out 0x02,r26 ldi r16,0 DO_LOOP_1: //8 cycles, repeated 10 times //output column address and most significant bit out 0x08,r24 out 0x05,r19 cpi r25,1 brne NO_SET sbi 0x05,6 //2 rjmp SET_COMPLETE NO_SET: nop nop nop SET_COMPLETE: //10 cycles, repeated 10 times //delay for insurance of logic propagation completed //read ten pixels in a column from SRAM, one per loop iteration cbi 0x05,5 //2 nop nop nop nop nop in r18,0x09 sbi 0x05,5 //2 //7 cycles, repeated 10 times //isolate color bits from input andi r18,63 //00111111 ori r18,48 //00110000 cpi r25,1 brne SET_NEG ori r18,64 //01000000 rjmp FINISHED_SET //2 SET_NEG: nop andi r18,191 //10111111 FINISHED_SET: //10 cycles, repeated 10 times //delay for insurance of logic propagation completed //print ten pixels in a column to SRAM, one per loop iteration //increment loop counter and row number out 0x05,r18 cbi 0x05,4 //2 adiw r24,1 //2 add r16,r17 nop nop sbi 0x05,4 //2 //3 cycles for loop, repeated 9 times //7 cycles for loop exit cpi r16,10 brne DO_LOOP_1 //1/2 add r26,1 sbiw r24,10 //2 rjmp NOPS_FROM_LINE_481_485 //2 //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: LINES 487-496 - 59 CYCLES, 10 times/screen //:::::::::::::::::::::::::::::::::::::::::::::::: //overwrite pixels covered by cursor in background //image stored in SRAM_Addr[17]=1 with the selected //color if the color is non-null and the cursor //has moved since last joystick read, overwriting //one row of 5 pixels per line VGA_LINES_487_496: //4 cycles if not escaping //3 cycles if selected color is null //5 cycles if cursor has not moved cpi r20,0 breq NOPS_FROM_LINE_481_485_ESCAPE_1 cpi r16,1 brne NOPS_FROM_LINE_481_485_ESCAPE_2 //4 cycles //set consistent row address bits and enable pins ldi r18,176 //10110000 add r18,r20 out 0x05,r18 out 0x08,r24 //5 cycles //set most significant address bit cpi r25,1 breq NEED_SET_2 //1/2 nop rjmp NO_SET_2 //2 NEED_SET_2: sbi 0x05,6 //2 NO_SET_2: //40 cycles //delay for insurance of logic propagation completed //send selected color to a row of 10 pixels in SRAM out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop sbi 0x05,4 //2 out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop sbi 0x05,4 //2 out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop sbi 0x05,4 //2 out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop sbi 0x05,4 //2 out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop sbi 0x05,4 //2 //5 cycles //increment row number and reset column number subi r26,5 //2 adiw r24,1 //2 rjmp NOPS_FROM_LINE_487_496 //2 //escape printing the selected color on the background //if color is clear or cursor has not moved NOPS_FROM_LINE_481_485_ESCAPE_1: nop nop NOPS_FROM_LINE_481_485_ESCAPE_2: rjmp NOPS_FROM_LINE_481_485_ESCAPE //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: LINES 498-507 - 63 CYCLES, 10 times/screen //:::::::::::::::::::::::::::::::::::::::::::::::: //overwrite pixels covered by cursor in foreground //image stored in SRAM_Addr[17]=0 with cursor backcolor //(shaded white) overwriting one row of 5 pixels per line VGA_LINES_498_507: //3 cycles //set consistent row address bits and enable pins ldi r18,63 //00111111 out 0x05,r18 out 0x08,r24 //5 cycles //set most significant address bit cpi r25,1 breq NEED_SET_3 //1/2 nop rjmp NO_SET_3 //2 NEED_SET_3: sbi 0x05,6 //2 NO_SET_3: //50 cycles //delay for insurance of logic propagation completed //send selected color to a row of 10 pixels in SRAM out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop nop nop sbi 0x05,4 //2 out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop nop nop sbi 0x05,4 //2 out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop nop nop sbi 0x05,4 //2 out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop nop nop sbi 0x05,4 //2 out 0x02,r26 cbi 0x05,4 //2 add r26,1 nop nop nop nop sbi 0x05,4 //2 //5 cycles //increment row number and reset column number subi r26,5 adiw r24,1 //2 rjmp NOPS_FROM_LINE_498_507 //2 //:::::::::::::::::::::::::::::::::::::::::::::::: // :::: LINES 509-511 - 122 CYCLES, 3 times/screen //:::::::::::::::::::::::::::::::::::::::::::::::: //overwrite pixels covered by cursor in foreground //image stored in SRAM_Addr[17]=0 with cursor forecolor //(user selected) overwriting one column of 6 pixels per line VGA_LINES_509_511: //4 cycles //set consistent address bits for row and declare loop variable ldi r18,48 //00110000 add r18,r20 out 0x02,r26 ldi r16,0 DO_LOOP_2: //7 cycles, repeated 6 times //output column address and most significant bit out 0x05,r18 out 0x08,r24 cpi r25,1 breq NEED_SET_4 //1/2 nop rjmp NO_SET_4 //2 NEED_SET_4: sbi 0x05,6 //2 NO_SET_4: //9 cycles, repeated 6 times //print six pixels in a column, one per loop iteration //increment loop counter and row number cbi 0x05,4 //2 adiw r24,1 //2 add r16,r17 nop nop sbi 0x05,4 //2 //3 cycles for loop, repeated 5 times //7 cycles for loop exit cpi r16,6 brne DO_LOOP_2 //1/2 add r26,1 sbiw r24,6 //2 rjmp NOPS_FROM_LINE_509_511 //2 //-------------------------------------------------------------------- // ---- LINES 000-479 OUTPUT RGB - 529 CYCLES, 480 times/screen //-------------------------------------------------------------------- PROCEED_TO_RGB: //6 cycles //set most significant address bit cpi r31,1 breq SET_ADDRESS //1/2 cbi 0x05,6 //2 rjmp PRINT_RGB //2 SET_ADDRESS: sbi 0x05,6 //2 nop PRINT_RGB: //6 cycles cycles //set remaining address bits ldi r22,0 out 0x02,r22 out 0x08,r30 cbi 0x05,5 //2 add r22,r17 //9 cycles //enable tristate for all lines except when v_sync is low cpi r31,1 breq ENABLE_TRISTATE_1 //1/2 cpi r30,2 brlo SKIP_TRISTATE_EN //1/2 rjmp ENABLE_TRISTATE_2 //2 SKIP_TRISTATE_EN: nop nop rjmp BEGIN_RGB ENABLE_TRISTATE_1: nop nop nop ENABLE_TRISTATE_2: cbi 0x0B,5 //2 nop //509 cycles for 255 pixels //output address sequence to print 256 pixels across a row BEGIN_RGB: out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 add r22,r17 out 0x02,r22 //6 cycles sbi 0x05,5 //2 sbi 0x0B,5 //2 rjmp NOPS_FROM_LINE_000_479 //2 //-------------------------------------------------------------------- // ---- NOP - REMAINDER OF 637 CYCLES NOT FULFILLED ABOVE //-------------------------------------------------------------------- NOPS_FROM_LINE_481_485_ESCAPE: //615 cycles (7+below) nop nop nop nop nop nop nop NOPS_FROM_LINE_480X: //608 cycles (45+below) nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop NOPS_FROM_LINE_487_496: //563 cycles (8+below) nop nop nop nop nop nop nop nop NOPS_FROM_LINE_498_507: //555 cycles (60+below) nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop NOPS_FROM_LINE_509_511: //495 cycles (254+below) nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop NOPS_FROM_LINE_481_485: //241 cycles (147+below) nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop NOPS_FROM_LINE_000_479: //94 cycles nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop //**************************************************************************************** // **** FRONT PORCH = 16 CYCLES //***************************************************************************************** //7 cycles for RESTART_SCREEN //16 cycles for RESTART_LINE //increment line counter and return to start cpi r30,255 cpc r31,r17 breq SKIP_BELOW //1/2 adiw r30,1 //2 nop nop nop nop nop nop nop nop nop rjmp RESTART_LINE //2 SKIP_BELOW: nop rjmp RESTART_SCREEN //2 // RESTORE STATUS REGISTER pop r16 //2 out 0x3F,r16 //1 clr r0 clr r1 // RETURN FROM INTERRUPT ret //reti //4