MCLR 1 28 AVdd VREF+ CVREF+ C3INC CTED1 PGED3 AN0 RPA0 RA0 2 27 AVss VREF- CVREF- CTED2 PGEC3 AN1 RPA1 RA1 3 26 RB15 RPB15 AN9 SCK2 C3INA CTED6 PMCS1 C1IND C2INB C3IND PGED1 AN2 RPB0 RB0 4 25 RB14 RPB14 AN10 SCK1 C3INB CTED5 CVrefOut C1INC C2INA CTED12 PGEC1 AN3 RPB1 RB1 5 24 RB13 RPB13 AN11 CTPLS C1INB C2IND CTED13 SDA2 AN4 RPB2 RB2 6 23 Vusb C1INA C2INC RTCC SCL2 AN5 RPB3 RB3 7 22 RB11 RPB11 PGEC2 D- Vss 8 21 RB10 RPB10 PGED2 D+ CTED11 OSC1 RPA2 RA2 9 20 Vcap OSC2 RPA3 RA3 10 19 Vss SOSCI RPB4 RB4 11 18 RB9 RPB9 SDA1 CTED4 CTED9 T1CK SOSCO RPA4 RA4 12 17 RB8 RPB8 SCL1 CTED10 Vdd 13 16 RB7 RPB7 INT0 CTED3 RPB5 RB5 14 15 Vbus === General i/o === ANx: analog inputs RAx, RBx: bidirectional i/o port pins RPAx, RPBx: reassignable port pins configurable with Peripherial Pin Select (PPS) == Specific signals === CTEDx: Charge/Time Measurement external edge inputs for precision timing and capacitative touch interfaces CTPLS: Charge/Time Measurement output pulse CxINA, CxINB, CxINC, CxIND: Comparator inputs (comparator outputs are on PPS) D+, D-: USB data lines ICx: (input capture channels are on PPS) INTx: external interrupts OCx: output compare channels (PWM) (output compare outputs are on PPS) OCFA, OCFB: output compare fault input (output compare fault inputs are on PPS) OSC1, OSC2: crystal oscillator control PGEDx, PGECx: programming data, clock RTCC: real time clock alarm output SCKx: SPI clock output (other SPI signals are on PPS) === note I2C errors === (read the errata sheet http://people.ece.cornell.edu/land/courses/ece4760/PIC32/Microchip_stuff/Erata_PIC32MX.pdf) SCLx: I2C clock output SDAx: I2C data line ======================= SOSCI, SOSCO: 32.768 KHz low power crystal control T1CK: timer external clock input (other clock inputs are on PPS) UxRX, UxTX: USART transmit/receive lines VREF: external voltage reference for ADC (defaults to internal) CVREF: external voltage reference for CVrefOut (defaults to internal) CVrefOut: variable voltage reference output