# Test direct trigger of IRQ from code
#  pin_irq_test.py
from machine import Pin
import time

def IOreg_write(reg_addr, data):
    machine.mem32[reg_addr] = data
#   
def IOreg_set(reg_addr, data):
    machine.mem32[reg_addr + 0x2000] = data
#
def IOreg_clr(reg_addr, data):
    machine.mem32[reg_addr + 0x3000] = data
#   
def IOreg_xor(reg_addr, data):
    machine.mem32[reg_addr + 0x1000] = data
#
def IOreg_read(reg_addr):
    return machine.mem32[reg_addr]

# === IO =============================
# define low level i/o
# Function select -- datasheeet section 2.19.2
IO_base = 0x40014000
PADS_BASE = 0x4001c000
# list of registrs sectionn 2.19.6
# page 268 has bit defines of registers
def GPIO_CTRL(chan_num):
    return chan_num*8 + 4 + IO_base

def GPIO_STATUS(chan_num):
    return chan_num*8 + IO_base

def GPIO_PAD_CTRL(pad_num):
    return (pad_num*4 + 4) + PADS_BASE

# bits in GPIO_CNTL
# these are overrides to ALL other functions
# of the pins, but these also enable the SIO function

def GPIO_DRIVE_LO(chan_num):
    # set to output, low, SIO enabled (function 5)
    IOreg_write(GPIO_CTRL(chan_num), (0x03 <<12) | (0x02 << 8) | 5)

def GPIO_DRIVE_HI(chan_num):
    # set to output, hi, SIO enabled (function 5)
    IOreg_write(GPIO_CTRL(chan_num), (0x03 <<12) | (0x03 << 8) | 5)
   
# ============================================
# interrupt trigger pin
# the low-level effect of this function is to
# clear the GPIO cntl register and set SIO (function 5)
p2 = Pin(2, Pin.OUT)

# output LED pin toggled in the p2-ISR
led = Pin(25, Pin.OUT)

# the ISR
def pin2_irq(pin):
    led.toggle()

# bind ISR function to GPIO 2 IRQ
p2.irq(lambda pin: pin2_irq(pin), Pin.IRQ_FALLING, hard='TRUE')

# Now toggle the interrupt pin
for x in range(0, 100):
    time.sleep_ms(50)
    # replace high level with register calls
    # to trigger ISR on GPIO 2
    GPIO_DRIVE_HI(2)   
    GPIO_DRIVE_LO(2)