EE 476: Homework 4
Due At the start of your 4th lab period
Read all of Lab 4.
Write the source code necessary to impliment the
for Lab 4. You must set up the UART control registers
as shown in the example code in
Lab 4. To use Timer1 capture mode, you will also need to set bits in
TCCR1B and ACSR, and in TIMSK if you use the capture interrupt.
- In terms of R2, R3, R4 and C as shown in lab 4, determine the time
at which the voltage at PortB2 becomes greater than the voltage at
PortB3. Assume that PortB2 starts at zero voltage at the instant
that the pin is converted from an output to an input, and call that instant
time=0. Also assume that the loading from the comparator inputs is negligable.
- Select values for R2, R3 and R4 which are "good" as explained below.
- As mentioned in
Lab 4, it is handy if the voltage at PortB3 is (Vcc)(1-e-1) so
that PortB2 will reach an equal voltage in a time equal to one time constant.
There is a constraint that
5k<(R4+R3)<100k . The low end
constraint avoids loading the output too much. The high end constraint avoids
- Once you pick a clock
prescaler value, R2 can be adjusted so that the actual number of clock
ticks which accumulate until the voltage at PortB2 equals that at PortB3
is equal to 2n times the capacitance. Scaling the count becomes
just shift-right commands.
Copyright Cornell University 1999