// Copyright 2007 Altera Corporation. All rights reserved. // Altera products are protected under numerous U.S. and foreign patents, // maskwork rights, copyrights and other intellectual property laws. // // This reference design file, and your use thereof, is subject to and governed // by the terms and conditions of the applicable Altera Reference Design // License Agreement (either as signed by you or found at www.altera.com). By // using this reference design file, you indicate your acceptance of such terms // and conditions between you and Altera Corporation. In the event that you do // not agree with such terms and conditions, you may not use the reference // design file and please promptly destroy any copies you have made. // // This reference design file is being provided on an "as-is" basis and as an // accommodation and therefore all warranties, representations or guarantees of // any kind (whether express, implied or statutory) including, without // limitation, warranties of merchantability, non-infringement, or fitness for // a particular purpose, are specifically disclaimed. By making this reference // design file available, Altera expressly does not recommend, suggest or // require that this reference design file be used in combination with any // other product not provided by Altera. ///////////////////////////////////////////////////////////////////////////// // baeckler - 08-24-2007 // // Memory and tiny state machine to implement ternary CAM. // Intended for stitching to build larger CAMs // // RAM is addressed by data bits, the stored content represents // one hot coded address lines, eg. data 0 = 110 means data 0 // matches addresses 1 and 2. // // The state machine handles don't cares, writing a new value // takes approximately 128 ticks (blocking), as the machine // iterates the data to see which slots match the don't care mask. // // Lookup is pipelined, at the RAM latency of 2 // module cam_ram_block ( clk,rst, waddr,wdata,wcare,start_write,ready, lookup_data,match_lines ); // data 7 addr 5 produces 2^7 words of 2^5 bits // natural for a SII 4K RAM block parameter DATA_WIDTH = 7; parameter ADDR_WIDTH = 5; parameter WORDS = (1<