Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
u3|RS232_In_Counter |
3 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
u3 |
4 |
1 |
0 |
1 |
10 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
u2|Out_Counter |
3 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
u2 |
11 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
cpu1|dpram0 |
44 |
0 |
0 |
0 |
36 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
cpu1|alu0|m_10_8 |
36 |
0 |
0 |
0 |
18 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
cpu1|alu0 |
41 |
0 |
0 |
0 |
18 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
cpu1|stackm0 |
43 |
0 |
0 |
0 |
36 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
cpu1|statef0 |
4 |
1 |
0 |
1 |
2 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
cpu1 |
39 |
21 |
0 |
21 |
72 |
21 |
21 |
21 |
0 |
0 |
0 |
0 |
0 |
display|altsyncram_component|auto_generated|mux5 |
68 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
display|altsyncram_component|auto_generated|mux4 |
68 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
display|altsyncram_component|auto_generated|decode_b |
7 |
1 |
0 |
1 |
62 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
display|altsyncram_component|auto_generated|decode_a |
7 |
1 |
0 |
1 |
62 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
display|altsyncram_component|auto_generated|decode3 |
7 |
0 |
0 |
0 |
62 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
display|altsyncram_component|auto_generated|decode2 |
7 |
0 |
0 |
0 |
62 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
display|altsyncram_component|auto_generated |
42 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
display |
42 |
3 |
0 |
3 |
2 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
u1 |
36 |
6 |
0 |
6 |
74 |
6 |
6 |
6 |
0 |
0 |
0 |
0 |
0 |
p1 |
2 |
0 |
0 |
0 |
3 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
r0 |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |