This project allows room for more improvements and features.
- Formally create a graphics operation cache that would be manipulated on the fly from software running on a NIOS II.
- Create a NIOS II specifically to generate edges for more complicated objects, and to place them directly into the edge list.
- Improve the computation pipeline's speed by collapsing all pending transformations into one matrix, and then finding a way to fit all the necessary multipliers.
This may involve computing only one point in one edge at a time, which requires fewer multipliers to be synthesized.
- Create an abstract model in order to be able to use Flash, SRAM, and SDRAM.
The state machines in the pipelines may need to be modified to support waiting for results from memory to return, since M4K blocks respond with one cycle later.
For slow memories, multiple read ports can be wired and a cache can be created, amortizing most of the delay in the memory accesses.
- After such an abstract memory model is implemented, then the edge list can be transformed into indices into a point list.
This would reduce the number of transformations needed for objects that are highly connected such as spheres.
- Implement a structure to update parametrized values for each frame.
- Compress the bits in the screen buffer. Currently, we use 16 bits per pixel, which, for a wireframe, is 16 times more than necessary.
- If frames are to be implemented, then at least an additional VGA display buffer would be needed - one to serve current requests from the VGA controller, and another to be rasterized from the new points coming from the three pipelines.
2007-12-02
