EE 576: Laboratory 5

Design project.

Introduction.

For this exercise, we want you to pick a project, then design and build it. During this period there will be no other assignments, so we expect you to spend all of your time for this course on the project. You will be expected to be in lab at the usual times and to show significant progress each week of the project.

Grading:

When choosing a project you will need to consider availability of hardware, time available, a monetary budget, and your programming skill. You may want to look at several of the links on the 576 home page for project ideas.


Procedure:

Depends on what you will build. There are some ideas available. You should talk often to your lab instructor. You can use any combination of Verilog, SOPC, ASM, C, and an operating system. Your project will be limited to using one DE2 development board at all times. If you intend to hook hardware to the DE2 expansion connectors, you must get explicit permission.


Assignment

You will be graded on several aspects of the project:

  1. Appropriate level of hardware/software complexity.
  2. Appropriate use of external hardware, Verilog generated hardware, assembler, C, and operating systems. You need not have a microcontroller instantiated on the FPGA, but many of you will.
  3. A project which works according to specification (which you will write).
  4. Level of effort and organization shown in lab.
  5. A demonstration of the final project during the last regular scheduled lab period of the semester. The demonstration will include an explanation of your web page describing the project.
  6. Completeness and understandability of the final report. The report must be handed in when you do the project demo during your last regular lab period. The report which you hand in must be printed directly from a web page which you construct. The web page will consist of one folder with exactly one html file with the file name index.html. In the folder there may be Verilog source files, c-source files, images, mpegs, or other supporting documents linked to the one html file. When posting code, you must comply with all Altera IP considerations.
    Documentation must include all the major sections. You may omit specific sections not relevant to your project:
Your web page may optionally be submitted for inclusion on the class web page.
If you wish to do this:

  1. Put all of your web page files in one directory. Name this directory with the concantented netids of all the group members, e.g., brl4_rw88
    Since the pages will be on a UNIX server, you should:
  2. ZIP the directory.
  3. email it to BRL4@cornell.edu.


Copyright Cornell University July 2006