Publications

We present a comprehensive study of the impact a diverse set of application, hardware, and isolation configurations have on tail latency for two representative interactive services, Memcached and NGINX. We conduct this study on two server platforms with significant differences in terms of architecture and price points: an Intel Xeon and an ARM-based Cavium ThunderX server. Experimental results show that latency on both platforms is subject to changes of several orders of magnitude depending on application and system settings, with Cavium ThunderX being more sensitive to configuration parameters.
in IISWC 2017

We propose SWAP (“Set and WAy Partitioning”), a scalable and fine-grained cache management technique that seamlessly combines set and way partitioning without additional hardware requirement. By cooperatively managing cache ways and sets, SWAP can successfully provide hundreds of fine-grained cache partitions for the manycore era.
in HPCA 2017

We study one of the most basic operations in database--sorting on a hybrid storage system with both precise storage and approximate storage. We propose an approx-refine execution mechanism to improve the performance of sorting algorithms on the hybrid storage system to produce precise results.
in SIGMOD 2016

We propose an improved RF design in GPGPU with a bank stealing technique, which enables a high RF throughput with compact area. We identify the deficiency in the state-of-the-art RF designs as the bank conflict problem, while the majority of conflicts can be eliminated leveraging the fact that the highly-banked RF oftentimes experiences under-utilization. Our lightweight bank stealing technique can opportunistically fill the idle banks for better operand service.
in ISLPED 2015

Experiences

Software Engineering Intern at Cavium Inc, Summer 2016

  • San José, CA, USA
  • Mentor and Manager: Bobbie Manne

Teaching

I was a teaching assistant of the following courses:

  • ECE2400: Computer Systems Programming (Spring 2017)
  • ECE4750/CS4420: Computer Architecture (Fall 2016)

Contact

  • 471C Rhodes Hall, Cornell University, NY 14853, USA