Design of a circuit to test a high-speed interface
to a PC
http://people.ece.cornell.edu/wes/Projects
We need a test circuit to exercise a high speed
32-bit parallel interface from National Instruments.
We want to use this interface for the CUPRI radar
but there are many features we need to learn how
to use before creating the design for the radar.
The interface must provide sustainable data
transfer rates of 5 to 20 megawords per second.
(In the final radar implementtion, one word would be
the numerical value of a digitally filtered voltage
that would typically have about 16 bits of dynamic
range.) The interface must be bi-directional, but
the output data rates need not be a great as the
input rates above.
Specific tasks:
Design requirments:
To demonstrate high speed data transfers.
Programmable selection order (input/output/destination/source) for all data transfers.