Ecenur Ustun

I am a Ph.D. candidate in Electrical and Computer Engineering at Cornell University, advised by Prof. Zhiru Zhang. I am vastly interested in accelerating FPGA design closure by leveraging various learning techniques (e.g., graph representation learning, reinforcement learning) and domain specification. I was a research intern at Xilinx Research Labs in Summer 2020. I received my B.S. degree in Electrical and Electronics Engineering from Boğaziçi University, Istanbul, Turkey in 2016. In Summer 2015, I was an undergraduate researcher at MIT. Ecenur Ustun

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