;*******************RSA encryption Routine************ ;**Encrypts Numbers using 8 bit RSA encryption******** ;def statements: ;.def RSAd =r21 ;.def RSAm =r22 ;.def RSAs =r13 .def RSAr =r24 .def drem16uL=r14 .def drem16uH=r15 .def dres16uL=r16 .def dres16uH=r17 .def dd16uL =r16 .def dd16uH =r17 .def dv16uL =r18 .def dv16uH =r19 .def dcnt16u =r20 ;changed these around a little .def mc8u =r18 ;multiplicand .def mp8u =r16 ;multiplier .def m8uL =r16 ;result Low byte .def m8uH =r17 ;result High byte .def mcnt8u =r19 ;loop counter ;***********end def statements*********** encrypt: push RSAr ;push all the used registers except the source push RSAd push RSAm push r14 push r15 push r16 push r17 push r18 push r19 push r20 ldi RSAr, 1 ; result=1 encloop: sbrs RSAd, 0 ;if(e%2=1) do, else skip rjmp endencif mov mp8u, RSAr ;multiply result by source mov mc8u, RSAs ;source is s rcall mpy8u ;mov dd16uH, m8uH;divide the product from above ;mov dd16uL, m8uL mov dv16uL, RSAm;by the modulus clr dv16uH ; 16/8 divide rcall div16u mov RSAr, drem16uL; result is the remainder endencif: mov mp8u, RSAs mov mc8u, RSAs; source is s rcall mpy8u ;mov dd16uH, m8uH ;mov dd16uL, m8uL mov dv16uL, RSAm clr dv16uH ; 16/8 divide rcall div16u mov RSAs, drem16uL; s is the remainder lsr RSAd; integer divide e by 2 clr r14 cp RSAd, r14 brne encloop endencloop: mov RSAs,RSAr ;store the result in the register where source is. pop r20 pop r19 pop r18 pop r17 pop r16 pop r15 pop r14 pop RSAm pop RSAd pop RSAr ret ;*************************************************************************** ;* ;* "mpy8u" - 8x8 Bit Unsigned Multiplication ;* ;* This subroutine multiplies the two register variables mp8u and mc8u. ;* The result is placed in registers m8uH, m8uL ;* ;* Number of words :9 + return ;* Number of cycles :58 + return ;* Low registers used :None ;* High registers used :4 (mp8u,mc8u/m8uL,m8uH,mcnt8u) ;* ;* Note: Result Low byte and the multiplier share the same register. ;* This causes the multiplier to be overwritten by the result. ;* ;*************************************************************************** ;***** Subroutine Register Variables ;***** Code mpy8u: clr m8uH ;clear result High byte ldi mcnt8u,8 ;init loop counter lsr mp8u ;rotate multiplier m8u_1: brcc m8u_2 ;carry set add m8uH,mc8u ; add multiplicand to result High byte m8u_2: ror m8uH ;rotate right result High byte ror m8uL ;rotate right result L byte and multiplier dec mcnt8u ;decrement loop counter brne m8u_1 ;if not done, loop more ret ;*************************************************************************** ;* ;* "div16u" - 16/16 Bit Unsigned Division ;* ;* This subroutine divides the two 16-bit numbers ;* "dd8uH:dd8uL" (dividend) and "dv16uH:dv16uL" (divisor). ;* The result is placed in "dres16uH:dres16uL" and the remainder in ;* "drem16uH:drem16uL". ;* ;* Number of words :19 ;* Number of cycles :235/251 (Min/Max) ;* Low registers used :2 (drem16uL,drem16uH) ;* High registers used :5 (dres16uL/dd16uL,dres16uH/dd16uH,dv16uL,dv16uH, ;* dcnt16u) ;* ;*************************************************************************** ;***** Subroutine Register Variables ;***** Code div16u: clr drem16uL ;clear remainder Low byte sub drem16uH,drem16uH;clear remainder High byte and carry ldi dcnt16u,17 ;init loop counter d16u_1: rol dd16uL ;shift left dividend rol dd16uH dec dcnt16u ;decrement counter brne d16u_2 ;if done ret ; return d16u_2: rol drem16uL ;shift dividend into remainder rol drem16uH sub drem16uL,dv16uL ;remainder = remainder - divisor sbc drem16uH,dv16uH ; brcc d16u_3 ;if result negative add drem16uL,dv16uL ; restore remainder adc drem16uH,dv16uH clc ; clear carry to be shifted into result rjmp d16u_1 ;else d16u_3: sec ; set carry to be shifted into result rjmp d16u_1