An Introduction to the MOS 6502


The MOS Technologies 6502 processor was one of the most popular CPUs of the late 1970's and early 1980's. It was introduced in 1975 as an inexpensive alternative to designs from several other companies, notably Motorola and Intel, not to mention that it outperformed most of them.

MOS Technologies was started by a group of engineers from Motorola who had designed the 6800 processor. Their original, completely new design was the 6501, which prompted Motorola to sue because its pin layout was compatible with the 6800. As a result, they rearranged the pin layout, and thus the 6502 was born.

The 6502 was first sold in September 1975, for $25, which was over $100 less than their main competitor's chips, the Motorola 6800 and Intel 8008. Its popularity soared, and it worked its way into many mainstream systems, including the Atari 2600, Apple II, Commodore PC, Nintendo Entertainment System, and even Furbys (aww).


The MOS 6502 is an 8-bit processor with a 16-bit address bus. Despite its slow clock speed (approx. 1MHz), the internal processing logic runs four times as fast, thus making the chip competitive with other, higher-clocked CPUs. The 6502 has only 5 registers, all 8 bits wide: an accumulator, two index registers (X and Y), a processor status register, and a stack pointer.

The stack address space ranges from 0x100 to 0x1FF. There are four implied stack instructions used to access the stack. They are pha/pla, to push and pull the accumulator, and php/plp, to push and pull the processor status register, respectively. There are numerous addressing modes available for each instruction. These include implied, absolute, relative, accumulator, indexed indirect, indirect indexed, and immediate. There is also a zero-page mode that accesses memory locations in the first page of memory (addresses 0 to 255), consuming one less byte for the address. Relative addressing was used mostly by branches, which could move to a location +/- 128 bytes from itself.

There are a number of undocumented instructions too, which resulted from about 32 opcodes being left undefined in the original specification. Also, in the original 6502, the indirect jump instruction, JMP (xxxx), was broken. This problem was not fixed until the 65C02.

A more detailed specification sheet on the 6500 series family of processors can be found here.

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