/**

LS7266R1 Driver for Atmel AVR

Daniel Beer and Tony Lloyd

ECE 476

Usage:

#include "ls7266r1.h": Include the driver file

LS_init(): Initialize the driver

LS_write_RLD, LS_write_IOR, LS_write_CMR, LS_write_IDR(axis, value): Write control value to LS chip to axis. Axis can be select_X, select_Y or select_XY;

LS_read_FLAG(axis): Read flag register value from axis. Axis can be select_X or select_Y.

LS_read_output(axis): Read 24-bit output value from axis. Axis can be select_X or select_Y.

LS_write_preset(axis, value): Write 24-bit preset register value to axis. Axis can be select_X, select_Y or select_XY;

**/

#ifndef _LS7266R1_H_

#define _LS7266R1_H_

#pragma warn-

// ****************************************************************

// LCD Setup

// ****************************************************************

// Data output port

#ifndef LS_data_out

#define LS_data_out PORTA

#endif

// Data input port

#ifndef LS_data_in

#define LS_data_in PINA

#endif

// Data ddr

#ifndef LS_data_ddr

#define LS_data_ddr DDRA

#endif

// Control output

#ifndef LS_ctrl_out

#define LS_ctrl_out PORTC

#endif

// Control ddr

#ifndef LS_ctrl_ddr

#define LS_ctrl_ddr DDRC

#endif

// Chip enable ddr

#ifndef LS_chipenable_ddr

#define LS_chipenable_ddr DDRC.3

#endif

// Chip enable output

#ifndef LS_chipenable_out

#define LS_chipenable_out PORTC.3

#endif

// ****************************************************************

// Defines

// ****************************************************************

#define ctrl_mask 0b00001111

#define data_mask 0b00011111

#define chipenable_OFF 1

#define chipenable_ON 0

#define write_ctrl 0b01010000

#define write_data 0b00010000

#define ctrl_write_next 0b00100000

#define ctrl_chip_off 0b00110000

#define select_X 0b00000000

#define select_Y 0b01000000

#define select_XY 0b10000000

#define data_select_mask 0b10000000

#define ctrl_select_mask 0b01000000

#define read_ctrl 0b01100000

#define read_data 0b00100000

#define ctrl_read_next 0b00010000

#define addr_RLD 0b00000000

#define addr_CMR 0b00100000

#define addr_IOR 0b01000000

#define addr_IDR 0b01100000

#define RLD_reset_BP 0b00000001

#define RLD_reset_CNTR 0b00000010

#define RLD_reset_FLAGS 0b00000100

#define RLD_reset_E 0b00000110

#define RLD_trnsfr_PR 0b00001000

#define RLD_trnsfr_CNTR 0b00010000

#define RLD_trnsfr_PR0 0b00011000

#define IOR_enable_AB 0b00000001

#define IOR_LCNTR 0b00000000

#define IOR_LOL 0b00000010

#define IOR_RCNTR_ABgate 0b00000100

#define IDR_enable_index 0b00000001

#define IDR_positive_polarity 0b00000010

#define IDR_index_RCNTR 0b00000100

#define FLAG_BT 0x01

#define FLAG_CT 0x02

#define FLAG_CPT 0x04

#define FLAG_S 0x08

#define FLAG_E 0x10

#define FLAG_U 0x20

#define FLAG_ID 0x40

#define CMR_BCD 0x01

#define CMR_count_RANGE 0x02

#define CMR_count_NONRECYCLE 0x04

#define CMR_count_MODN 0x06

#define CMR_quad_X1 0x08

#define CMR_quad_X2 0x10

#define CMR_quad_X4 0x18

// ****************************************************************

// Functions

// ****************************************************************

// Initialize the LS chip

// Cycles: 22

void LS_init(void)

{

LS_ctrl_ddr = (LS_ctrl_ddr | 0xf0);

LS_data_ddr = 0xff;

LS_chipenable_ddr = 1;

LS_ctrl_out = (LS_ctrl_out & ctrl_mask) | ctrl_chip_off;

}

// Write a byte to the LS chip

// Cycles: 79-86

void LS_write(unsigned char type, unsigned char addr, unsigned char XYselect, unsigned char data)

{

LS_chipenable_out = chipenable_ON;

LS_data_ddr = 0xff;

if (type == write_ctrl)

LS_data_out = (data & data_mask) | addr | (XYselect & data_select_mask);

else

LS_data_out = data;

LS_ctrl_out = (LS_ctrl_out & ctrl_mask) | type | (XYselect & ctrl_select_mask);

#asm

nop

nop

nop

#endasm

LS_ctrl_out |= ctrl_write_next;

LS_ctrl_out = (LS_ctrl_out & ctrl_mask) | ctrl_chip_off;

LS_chipenable_out = chipenable_OFF;

}

// Read a byte from the LS chip

// Cycles: 70

unsigned char LS_read(unsigned char type, unsigned char XYselect)

{

unsigned char result;

LS_chipenable_out = chipenable_ON;

LS_data_ddr = 0x00;

LS_data_out = 0x00;

LS_ctrl_out = (LS_ctrl_out & ctrl_mask) | type | (XYselect & ctrl_select_mask);

#asm

nop

nop

nop

#endasm

result = LS_data_in;

LS_ctrl_out |= ctrl_read_next;

LS_ctrl_out = (LS_ctrl_out & ctrl_mask) | ctrl_chip_off;

LS_chipenable_out = chipenable_OFF;

return result;

}

// Read a 24-bit value from the LS chip

// Cycles: 392

signed long int LS_read_output(unsigned char XYselect)

{

unsigned long int result;

LS_write(write_ctrl, addr_RLD, XYselect, RLD_reset_BP | RLD_trnsfr_CNTR);

result = LS_read(read_data, XYselect);

result += (unsigned int)(LS_read(read_data, XYselect)) << 8;

result += (signed long int)(LS_read(read_data, XYselect)) << 16;

result += (signed long int)((result & 0x00800000)? 0xff000000 : 0x00000000);

return result;

}

// Write a 24-bit value to the LS chip

// Cycles: 370

void LS_write_preset(unsigned char XYselect, signed long int preset)

{

LS_write(write_ctrl, addr_RLD, XYselect, RLD_reset_BP);

LS_write(write_data, 0, XYselect, (unsigned char) (preset & 0xff));

LS_write(write_data, 0, XYselect, (unsigned char) ((preset >> 8)& 0xff));

LS_write(write_data, 0, XYselect, (unsigned char) ((preset >> 16)& 0xff));

}

// Read the flag register

#define LS_read_flag(XYselect) LS_read(read_data, XYselect)

// Write the preset register

#define LS_write_PRS(XYselect, data) LS_write(write_data, 0, XYselect, data)

// Write the RLD register

#define LS_write_RLD(XYselect, data) LS_write(write_ctrl, addr_RLD, XYselect, data)

// Write the CMR register

#define LS_write_CMR(XYselect, data) LS_write(write_ctrl, addr_CMR, XYselect, data)

// Write the IOR register

#define LS_write_IOR(XYselect, data) LS_write(write_ctrl, addr_IOR, XYselect, data)

// Write the IDR register

#define LS_write_IDR(XYselect, data) LS_write(write_ctrl, addr_IDR, XYselect, data)

#pragma warn+

#endif