Sample behavioral waveforms for design file sdrampll.v

The following waveforms show the behavior of altpll megafunction for the chosen set of parameters in design sdrampll.v. The design sdrampll.v has Cyclone II PLL_TYPE pll configured in NORMAL mode The primary clock input to the PLL is INCLK0, with clock period 20000 ps.

Fig. 1 : Wave showing NORMAL mode operation.