Suggested course:
ECE 5725 will be useful for students taking this course
More specifically, you need to know:

• Digital design using synthesizable Verilog
• Linux on ARM, with some low-level memory mapping
• C programming (Linux IPC, POSIX threads, UDP)
• Some electronic construction
• Ablity to find and read complex hardware/software data sheets.

This course may be restricted only to MEng students.

Reading
We will expect you to become completely familiar with a large amount of detailed FPGA, ARM, and LINUX information from Altera and other sources.
You will have to find, read, and apply appropriate information.

Purpose
The purpose of this course is to enable its students to carry out sophisticated designs of digital systems using system-on-programmable-chip (SOPC) techniques, along with a variety of digital and analog interface technologies to build complex devices.

This course is a design course. This means that we will expect you to show considerable creativity, flexibility, and motivation.
In particular you will need to:

• Hit the web to find your own answers to questions you have.
• Read and understand every aspect of manufacturer's data sheets for a variety of devices.
• Use material from many of the courses you have taken.
• Find solutions on your own from general, incomplete specifications. The lab assignments will be open-ended. Clever, efficient solutions will be rewarded. Detailed designs must be generated by the student teams before they get to lab. Designs will typically include C language code, digital circuitry designed in Verilog, and use of digital and analog peripherals.

Course Work

There will be lab assignments and a final project.

The course grade will be calculated as follows:

• 50% labratory assignments
  • Ask lots of questions, read the material, and write code before lab. You are expected to be familiar with the assignment before coming to lab. Roughly 20% of your lab grade depends upon two weekly lab checkpoints. Another 30% depends on the quality, quantity and character of the lab exercise demonstration. The remaining 50% will be based on your lab writeup. The same ratios (20, 30, 50%) are used to evaluate the final project.
  • Lab writeups are due at the night before the next lab period at 2300.
  • No late writeups will be accepted without prior permission.
    (Except for sickness or family emergency)
  • A late writeup receives a ZERO grade.
  • Laboratory work will be done in groups of two or three where, of course, collaboration is encouraged between members of the group. You will turn in one report per team. No written collaboration between groups is permitted. You are (of course) encouraged to help anyone in lab.
• 50% for the final project. Final project grades will be assigned by rank-ordering all projects in all sections, thus you will be competing against everyone in the class for this grade. This means that staff will not be able to estimate your grade on this project until all projects are finished and handed in.
• If you feel that you have been unfairly graded, you have one week from the time the assignment is handed back to request a regrade. To request a regrade, you must submit the assignment with a written description of your concern attached to the instructor.

Laboratory Policies

You are expected to attend your assigned lab period every week and to finish the lab assignment in the alloted time. You must finish the assignment by the demo deadline, or you will lose up to 30% of your lab grade. All negotiations concerning lab absences due to plant trips or sickness are to be conducted with your lab TA. For plant trips you must notify your instructor in advance.

Lab work will be in groups of 2 or 3. Both members are expected to become proficient with all aspects of the lab. Where each has prepared design work or code assigned as homework, the group design will involve negotiation. The members of a group may be graded differentially if it becomes obvious that one person is doing the bulk of the work.

Academic Conduct

Each student in this course is expected to abide by the Cornell University Code of Academic Integrity. Any work submitted by a student in this course for academic credit will be the student's own work. For this course, collaboration is allowed between partners in a group. Students agree that by taking this course all required papers may be subject to submission for textual similarity review to Turnitin.com for the detection of plagiarism. All submitted papers will be included as source documents in the Turnitin.com reference database solely for the purpose of detecting plagiarism of such papers. Use of Turnitin.com service is subject to the Usage Policy posted on the Turnitin.com site. Course materials posted on the web are intellectual property belonging to the author.  Students are not permitted to buy or sell any course materials without the express permission of the instructor.  Such unauthorized behavior constitutes academic misconduct
Examples of allowed/not allowed collaboration:
++ Allowed: All homework and code must be shared within a group.
-- Not Allowed: Sharing of any material between groups.
++ Allowed: Talking in lab about code with another group.
-- Not Allowed: Emailing code to another group or using another group's keyboard to type code.
++ Allowed: Showing another group your circuit.
-- Not Allowed: Wiring for another group, or lending them your circuit.
++ Allowed: Talking about the contents of a lab report to another group.
-- Not Allowed: Copying anything (even one sentence) from any web or print document, unless the source is stated and the quote is short.
++ Allowed: Using code from previous final projects or web sources with attribution.
-- Not Allowed: Using code from previous final projects or web sources without attribution.

In the event of a major campus emergency course requirements, deadlines, and grading percentages are subject to changes that may be necessitated by a revised semester calendar or other circumstances.More information about changes in this course will be available on Piazza if necessary.

Laboratory Reports

Each laboratory assignment requires a written report. You will submit a single report for your group. The report should be submitted as a pdf to your TA.

The report should be a concise documentation of the project assigned. The presentation should be arranged so that any reader with technical competence in the subject can easily understand what was done and how it was done. The following report organization is suggested:

1. Introduction: Give a short explanation of what was done.
2. Describe the role of the ARM and FPGA sides in your design
3. RTL level description of your project and any relevant state machines.
4. Design and Testing Methods: Explain the approach you used for both software and hardware aspects of the assignment. Be sure to include the design of tests whose outcome are convincing to the reader (or to the instructor in the lab) that the requirements of the assignment have been met.
5. Results: Screen shots, videos, sound recordings, frequency analysis or what ever is necessary to document the functioning of your project.
6. Documentation: Include here drawings and program listings, together with any explanatory comments needed.
7. Answers to specific questions given in the lab writeups.
8. Comments: This optional section is for any comments the authors may wish to make concerning the assignment, including suggestions for improvement, excuses, and complaints. The purpose of this section is to encourage the writer to make the other sections clear, concise and understandable, and to reserve this section for creative comments.

A couple of example reports are from Idan Beck (1, 2). Further clarification:

1. Talk during your videos and explain everything that you are doing. Pretend that we are checking you off and walk through all of the specs.
2. Add a work distribution section to your reports detailing everyone's individual contributions.
3. Include a testing section which details individual unit tests that you have used to test each spec. Include Modelsim results as well.
4. State machine or flowchart detailing overall program flow. Description of integration of all of the individual components of your work, especially systems communicating between the HPS and FPGA.
5. Qsys layout description, including all of the modules that your used and their function. Describe the use of Qsys for integration with the HPS program.
6. Indent and comment your code.
7. Concluding remarks about the lab, anything that you would have done differently. 
8. Include a results section that clearly specifies the specs for the lab and how you met them.
   Quantify these results if possible, otherwise include images and diagrams.

Access to computers

You and your partner will have use of a PC, FPGA evaluation board, and peripheral breadboard in Phillips 238 during your assigned lab period. Students from other lab periods may use setups not needed by students attending their assigned lab. Machines are set up to erase all user info when you logout. You should always back up all your work. There is no excuse for lost work, even if it is because of a compiler or other system error.

Academic Concerns

If you are experiencing undue personal or academic stress at any time during the semester or need to talk with someone about a personal problem or situation, I encourage you to seek support as soon as possible. I am available to talk with you about stresses related to your work in my class. Additionally, I can assist you in reaching out to any one of a wide range of campus resources, including:

• Your college’s Academic Advising or Student Services Office
• Cornell Learning Strategies Center at 255-6310, http://lsc.sas.cornell.edu
• Gannett Health Services at 255-5155, www.gannett.cornell.edu
• Let’s Talk Drop–In Consultation and Support www.gannett.cornell.edu/Let’sTalk
• Peer Support provided by Empathy Assistance and Referral Service at 255-EARS

DISABILITY-RELATED CONCERNS: Students with either an ongoing or short-term disability are encouraged to contact Student Disability Services (SDS) for a confidential discussion of their need for academic accommodations.SDS is located in 420 CCC building; phone number is 254-4545.