csma_retr | Number of maximum CCA attempts, before giving up sending a frame. The parameter has the range 0 ... 7, with the following meaning:
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csma_seed | Seeding value for the random number generator of the CSMA-CA algorithm. | |
min_be | Value of the minimum backoff exponent in the CSMA-CA algorithm. | |
frame_retr | Number of attempts until giving up to send a frame sucessfully. The parameter has the range 0 ... 15, with the following meaning:
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For the configuration of the TX_ARET mode, the following sequences are defined:
panid | This is a 16 bit value for the PAN ID, which the address filter should match. | |
short_addr | This is the 16 bit value for the short address, which the address filter should match. | |
ext_addr | This is the 64 bit value for the extended address, which the address filter should match. | |
coord | This is a boolean flag, which is true, if the radio transceiver is used as PAN coordinator (see IEEE 802.15.4-2003, chapter "7.5.6.2"). |
If needed the RG_PHY_ED_LEVEL can be read out after reception of the frame, refer to PHY_ED_FRAME_END.
uint64_t var; uint8_t var_7_0 = var & 0xff // bit 7:0 uint8_t var_15_8 = (var >> 8) & 0xff // bit 15:8 uint8_t var_23_16 = (var >> 16) & 0xff // bit 23:16 uint8_t var_31_24 = (var >> 24) & 0xff // bit 31:24 uint8_t var_39_32 = (var >> 32) & 0xff // bit 39:32 uint8_t var_47_40 = (var >> 40) & 0xff // bit 47:40 uint8_t var_55_48 = (var >> 48) & 0xff // bit 55:48 uint8_t var_63_56 = (var >> 56) & 0xff // bit 63:56
trx_bit_write(SR_MAX_FRAME_RETRIES, 0); trx_bit_write(SR_MAX_CSMA_RETRIES, csma_retr); trx_bit_write(SR_CSMA_SEED_1, csma_seed_10_8); trx_reg_write(RG_CSMA_SEED_0, csma_seed_7_0); trx_bit_write(SR_MIN_BE, min_be); trx_bit_write(SR_TX_AUTO_CRC_ON, 1);
trx_reg_write(RG_PAN_ID_0, panid_7_0); trx_reg_write(RG_PAN_ID_1, panid_15_8); trx_reg_write(RG_SHORT_ADDR_0, short_addr_7_0); trx_reg_write(RG_SHORT_ADDR_1, short_addr_15_8); trx_reg_write(RG_IEEE_ADDR_0, ext_addr_7_0); trx_reg_write(RG_IEEE_ADDR_1, ext_addr_15_8); trx_reg_write(RG_IEEE_ADDR_2, ext_addr_23_16); trx_reg_write(RG_IEEE_ADDR_3, ext_addr_31_24); trx_reg_write(RG_IEEE_ADDR_4, ext_addr_39_32); trx_reg_write(RG_IEEE_ADDR_5, ext_addr_47_40); trx_reg_write(RG_IEEE_ADDR_6, ext_addr_55_48); trx_reg_write(RG_IEEE_ADDR_7, ext_addr_63_56); trx_bit_write(SR_I_AM_COORD, coord); trx_bit_write(SR_TX_AUTO_CRC_ON, 1);