PLL Handling

This section describes, how PLL events are handled and how the state of the PLL can be checked. The function of the interrupts TRX_IRQ_PLL_LOCK and TRX_IRQ_PLL_UNLOCK is described in more detail in the AT86RF230 data sheet.

The following sequences are defined:

PHY_UNLOCK_PLL

If the TRX_IRQ_PLL_UNLOCK and TRX_IRQ_PLL_LOCK interrupts are enabled and the MCU gets an TRX_IRQ_PLL_UNLOCK interrupt in one of the [PLL_BASIC] states, which is not followed by an TRX_IRQ_PLL_LOCK interrupt within 32 us, a critical error did occur. In this case no transmission and reception of frames is possible. The software should try to execute the sequence PHY_TEST_PLL in order to force the PLL to lock. If the TRX_IRQ_PLL_UNLOCK interrupt occurs during any frame tranmission and reception, these transaction has failed. The higher software layers will be able to handle this error in the same way like a normal tranmission error.

inline_mscgraph_70
Code example
    /* TRX_IRQ_PLL_UNLOCK occurs here */
    handle_unlock();

PHY_TEST_PLL

This sequence can be used to check, that the PLL locks under the current operating conditions (see also PHY_STATE_TRX_OFF__PLL_ON).

inline_mscgraph_71
Code example
    trx_bit_write(SR_TRX_CMD, CMD_PLL_ON);
    delay_us(180); /* TRX_IRQ_PLL_LOCK occurs within this period */

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