Configuration and Handling

Interrupts are asynchronous events, that can happen to the MCU at any time during the program execution. If an interrupt (IRQ) occurs, the MCU jumps to the interrupt vector and executes the corresponding interrupt service routine (ISR).

This section describes, how the the radio transceiver interrupts are configured (PHY_CFG_IRQ) and how they are handled (PHY_HANDLE_IRQ).


PHY_CFG_IRQ

In the RG_IRQ_MASK register it is configured, which of the asynchronous radio transceiver events generates interrupts at the MCU. The corresponding interrupt is enabled, if a bit in this register is set to 1.

Note:
If a certain mask bit in RG_IRQ_MASK is set to 0, the corresponding interrupt is supressed entirely and is therefore also not shown in the RG_IRQ_STATUS register.
Parameters:
knownirqs Mask value, which is written to RG_IRQ_MASK
inline_mscgraph_12
Code example
    trx_reg_write(RG_IRQ_MASK, knownirqs);

PHY_HANDLE_IRQ

If an interrupt event in the radio transceiver occurs, the IRQ pin is raised to active level (TRX_PIN_IRQ = HIGH). This causes an interrupt at the MCU. In the interrupt service routine (ISR), the MCU reads the RG_IRQ_STATUS register. This read operation causes that the IRQ pin changes back to inactive (low) level (TRX_PIN_IRQ = LOW) and with the value read from the RG_IRQ_STATUS register, the cause of the interrupt can be determined.

Note:
Dependent on the actual interrupt latency time of the MCU, within one interrupt event more than one flag bits can be set.
Return values:
cause This return parameter contains a flag value, where the bits of the corresponding interrupt reason are set to 1.
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Code example
    /* TRX_IRQ_[*] occurs here */
    cause = trx_reg_read(RG_IRQ_STATUS);
    proc_irq(cause);

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