Mega A/D and D/A

Analog to Digital and Digital to Analog
on an Atmel Mega644/1284
ECE 4760 Cornell University

Analog to Digital

There are several ways of converting an analog level to a number using the Mega644/1284, but this discussion will concentrate on using the built-in, 8-channel, 10-bit, successive approximation analog to digital converter (ADC). As with all the Mega644/1284 peripherials, there are a large number of ways of using the buit-in ADC. The input impedance of the ADC is around 100 MOhms, but the maximum source impedance for accurate operation of the sample-and-hold is 10 KOhm. Best accuracy requires that the ADC prescalar output be less than 200 KHz (resulting in about 15 KHz sample rate), but no lower than 50 KHz (to avoid sample-and-hold droop). The ADC will operate up to 1 MHz (about 75 KHz sample rate) with reduced accuracy. Of course, you must always low pass filter the analog input appropriately before feeding it to the ADC to avoid aliasing.

Is is a good idea to read chapter 23 of the mega1284 manual before using the ADC.
There are lots of details not covered in this page, such as autotriggering modes and power saving.

Simple polling.
The simplest way of using the ADC is to start a conversion in software, wait until it is done, read it, and repeat. This program (plus uart.c and uart.h) reads the ADC, starts a conversion, prints the value of the last conversion and repeats. The program polls the ADC completion bit (ADCSRA, ADSC bit goes low when conversion is complete), then the actual (8-bit) A/D conversion result, then starts a new conversion and prints the value to the USART. The program sets up the ADC to read left-adjusted, 8-bits only, using an internal Vref=Vcc. On the STK500 board, the Vref jumper must be un-mounted.
ADC ISR-driven, low noise, 10-bit conversion
This program uses interrupt driven A/D conversions to lower noise for 10-bit accuracy. During the conversion the MCU is put into ADC noise reduction sleep mode. This mode turns off most of the MCU to cut down on digital noise. The only way to wake it up is for the ADC to finish a conversion. When the program enters the while(1) loop it encounters an assembler sleep command. The MCU is disabled, the conversion is automatically started and runs, then the MCU is restarted and immedately executes the ADC ISR. Then execution resumes after the sleep command. Of course, to actually get 10-bit accuracy, you have to minimize outside interference, such as 60 Hz noise. If you don't need more than 8-bit accuracy, then you don't need to put the MCU to sleep. You can just define an ADC ISR, turn on the ADC interrupt, and the MCU will enter the ISR when the conversion is finished.

Timer ISR-driven periodic sampling and PWM output
Very often it is desirable to take analog readings at uniform sample rate. This program uses timer0 to produce a PWM output (see below) of an ADC input. The PWM is running at 62,500 samples/sec. Timer 1 clocks the ADC input to run at 8000 samples/sec and updates the PWM at that rate. You can loop the signal generator through an ADC input to the PWM output and then to speakers. Low pass the PWM output at about 10,000 radians/sec. Use the following circuit to connect the signal generator to input A.0.
Interesting things to try:
(1) Vary the prescalar until the ADC fails.
(2) Change the sample rate using OCR1A to see how fast you can go. You may need to change the ADC prescalar also.
(3) Slow down the sample rate so you can listen to aliasing artifact.
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Timer ISR-driven periodic sampling and R2R parallel DAC output
This program uses an R2R DAC connected to PORTB to produce an analog output (see below) of an ADC input. Use the above circuit to connect an audio source to input A.0. Timer 1 clocks the ADC input to run at 62,500 samples/sec and updates the DAC at that rate. You can loop the audio source through an ADC input to the DAC output and then to speakers. Low pass the DAC output at about 100,000 radians/sec. A minor variation on the program converts to ISR to assembler.

Differential input with gain.
This program uses polling to read the ADC and turns on the internal differential amplifier in the Mega64/1284. The gain is settable to 1, 10 or 200. The output of the ADC in differential mode is a 2's complement number representing the voltage diffenence between two analog input channels. Accuracy is limited to 8-bits for gains of 1 or 10 and to 6-bits for gain of 200. The example is set up to be 10*(channel1-channel0). Voltages at both inputs have to be between zero and Vref. Clearly, if you are using gain, you must make sure that the amplified difference is also between -Vref and Vref. The test inputs are shown below. Each potentiometer was adjusted to the middle of its range initially. Calibration of the ADC and internal differential preamp was verified with a voltmeter between the two wipers of the potentiometers. Note that differential mode is somewhat slower than single ended, has a high order 2's complement sign bit, and the differential amplifier has an analog bandwidth of 4 KHz. The data sheet says: "The differential input channels are not tested for devices in PDIP Package. This feature is only guaranteed to work for devices in TQFP and VQFN/QFN/MLF Packages.", but the differential input has worked in PDIP for me.

Digital to Analog

There is no built-in D/A on the Mega644/1284, but there are easy ways of converting numbers to voltages. I will describe three here:

Pulse Width Modulator (PWM)
The Mega32 has 3 PWM channels, each of which can be used to produce waveforms. The Output Compare pin is attached to a lowpass filter with a cutoff frequency of 0.1 or less of the PWM frequency. The output of the lowpass filter approximates the analog value represented by (8-bit timer output compare register)/256*(5 volts). A short example shows how you might implement a Direct Digital Synthesis (DDS) sine wave generator and output it through a PWM.
Use an external chip such as the one described on the SPI page.
Parallel D/A.
This scheme uses an R/2R ladder to assign binary weights to bits. Using 1% resistor packs you can expect to get about 7-bits of accuracy for this simple scheme. Adding a unity gain output buffer amplifier is a good idea if the load impedance is lower than a Mohm or so. The software to produce the waveform would typically write an 8-bit value to the port in an ISR at a fixed rate. One R2R possibility is a Bourns Inc. 4116R-R2R-253LF resistor array. All you need to add is an opamp to buffer the output of the array.