DE1-SoC
ADC and DAC capabilities
Cornell ece5760

ADC

-- Wolfson WM8731 Audio Codec Line-in: 2 channels, 16-24 bits, 96 Ksamples/sec, bandwidth ~30Hz to 20 kHz.
See also the Audio Core manual below. The examples on the DSP page show how to set up the Audio ADC and read the waveform from a Qsus bus-master. The HPS Interprocess Communication for video and audio and HPS to/from PC UDP communication examples on the DE1-SoC computer page shows how to set up the Audio ADC from the HPS. The data type is 2's complement integers. If you are using a 16-bit interface, think of the numbers as 1:15 fixed point (corresponding to +/-1 volt). If you use 32-bit, think of the numbers as 1:31 fixed point, but the lowest 16 bits are meaningless.

-- Linear Tech LTC2308 ADC: 8 channels, 12-bit, 500 Ksamples/sec.
See also the ADC Core manual below.
Note that the Quartus 15 University ADC does not work with the revision F DE1-SoC. You must use Quartus 16 version.

 

DAC

-- Analog Devices ADV7123 DAC: Triple 10-Bit High Speed Video, 140 Msamples/sec on each channel.
This device is designed for VGA DAC, but can be set up for continuous waveforms by bypassing Qsys. The third example on the old Nios2 GCC page shows how to set up the DAC. The code to output a sawtooth wave is quite simple. Note that the three color channels are not impedance protected, and if connected to ground through less than 50 ohms will be instantly destroyed!

//make a direct digital systnesis accumulator   
always @ (posedge CLOCK_50) begin 		
    DDS_accum <= DDS_accum + DDS_incr ; 	
end 	
//use the VGA DAC for an audio signal  	
assign VGA_R =  DDS_accum[31:22]; //10-bits 	
assign VGA_SYNC_N = 1; 	
assign VGA_BLANK_N = 1; 	
assign VGA_CLK = CLOCK_50; 

-- Wolfson WM8731 Audio Codec Line-out: 2 channels, 16-24 bits, 96 Ksamples/sec, bandwidth ~1Hz to 20 kHz.
See also the Audio Core manual below. The examples on the DSP page show how to set up the Audio DAC and write the waveform from a Qsus bus-master. The HPS Interprocess Communication for video and audio and HPS to/from PC UDP communication examples on the DE1-SoC computer page shows how to set up the Audio DAC from the HPS. The data type is 2's complement integers. If you are using a 16-bit interface, think of the numbers as 1:15 fixed point (corresponding to +/-1 volt). If you use 32-bit, think of the numbers as 1:31 fixed point, but the lowest 16 bits are meaningless.

-- Any number of PWM channels using i/o pins.
With a counter frequency of 50 MHz, and 8-bit analog resolution, the effective sample rate is 195 Ksamples/sec. This is fast enough to generate ~15 KHz sine waves. You could use all of the i/o pins to generate over 40 channels. with just a couple of lines of Verilog for each channel.


Audio Core

ADC core


Copyright Cornell University May 4, 2017