ECE 5760: Laboratory 4

Design project.

Introduction.

For this exercise, we want you to pick a project, then design and build it. During this period there will be no other assignments, so we expect you to spend all of your time for this course on the project. You will be expected to be in lab at the usual times and to show significant progress each week of the project.

Grading:

When choosing a project you will need to consider availability of hardware, time available, and your programming skill. You may want to look at several of the links on the 5760 home page for project ideas.


Procedure:

The procedure epends on what you will build. There are some ideas available, but the best projects grow out of student interests.
Examples of student-generated projects are:
Cricket 2007 Auto Batter
Dijkstra algorithm on FPGA
Big Red Strings: A FPGA Musical Trio

You should talk often to your lab instructor. You can use any combination of Verilog, Qsys, and ARM code,
but projects that use only the ARM9 and not the FPGA side will generally not be acceptable.
If you intend to hook hardware to the DE1-SoC expansion connectors, you must get explicit permission.


Assignment

You will be graded on several aspects of the project:

  1. Appropriate level of hardware/software complexity.
  2. Appropriate use of external hardware, Verilog generated hardware, C, and HPS.
  3. A project which works according to specification (which you will write).
  4. Level of effort and organization shown in lab.
  5. A demonstration of the final project during the last regular scheduled lab period of the semester.
  6. Completeness and understandability of the final report. The html report must be emailed to the instructor (see instructions below) at the date/time specified by the University for this class (not known until finals are announced). The web page will consist of one folder with exactly one html file with the file name index.html. In the folder there may be Verilog source files, c-source files, images, mpegs, zipped projects, or other supporting documents linked to the one html file. When posting code, you must comply with all INTEL IP considerations.
  7. You may optionally opt-in for inclusion of your project on the course page.
    This a new CORNELL requirement!

    You will automatically lose 5 points on your project if you do not include this!
    In the final report, Appendix A
    One of two sentences!
    Either: "The group approves this report for inclusion on the course website."
    Or: "The group does not approve this report for inclusion on the course website."

    If you will ever be asking me for a recommendation, I suggest that you opt-in your project.
    The project web pages help me remember the details of a project and person.
  8. I will submit student videos to YouTube for inclusion on the ece5760 channel, if you opt-in.
    This a new CORNELL requirement!

    You will automatically lose 5 points on your project if you do not include this!
    In the final report, Appendix A
    One of two sentences!
    Either: "The group approves the video for inclusion on the course youtube channel."
    Or: "The group does not approve the video for inclusion on the course youtube channel."


    Documentation must include all the major sections.
    You may omit specific sections not relevant to your project:
Your web page must be submitted for grading, and optionally posted on the class project page.
To do this:

  1. Put all of your web page files in one directory. Name this directory with the concantented netids of all the group members, e.g., brl4_rw88
    Since the pages will be on a UNIX server, you should:
  2. ZIP the directory.
  3. Send it to your partner's computer to see if it renders correctly.
  4. email it to BRL4@cornell.edu.
    Or if it is too big, send it via dropbox at https://dropbox.cornell.edu/


Copyright Cornell University January 23, 2019