Power Estimation/Measurement
in Quartus Prime
Cornell ece5760


Power Estimation

Power analysis in Quartus Prime is described in Quartus Prime Handbook Vol 3, chapter 9. We will be concerned with the Quartus PowerPlay Power Analyzer, but not the Early Power Estimator. A separate application note discusses Cyclone V SoC Power Optimization.

The dependability of the power analysis depends on the amount of detail that you give the analyser. At the very least, you need to compile, place and fit the design for the specific FPGA model and you need to estimate the time-density of signal transitions. The following example uses the project ZIP GPU with FAST display from SRAM from the bus-master page.

  1. In the Assignments menu, choose settings...PowerPlay
  2. In the Processing menu choose PowerPlay tool and set the time-density of signal transitions.
    For a quick estimate set Use vectorless estimation. The defaults for the analysis are shown.
    If you are using HPS, then open the HPS tab, enable the HPS, and set the clock frequency.
    It appears that 800 MHz is the highest you can set, which seems to match with the Qsys ARM9 dialog box.
    Open the Cooling tab and (for DE1-SoC) choose to no heat sink, low air flow.
  3. Back in the main PowerPlay window, press Start, wait for the analysis to finish, and press Report.
    This report is generated by the defaults above.
  4. With the HPS disabled in the HPS dialog, and explicit FPGA toggle frequencies chosen,
    the PowerPlay tool generates this report.

For a more accurate power estimate, you need to supply a Modelsim simulation result. Section 2.2.7 Generating Power Analysis Files in Quartus Prime Handbook Vol 3 shows how to generate a value_change_dump file (vcd file) to feed into the power analysis tool. Further information is in section 9.5.2 Using .vcd for Power Estimation, and particularly section Generating a .vcd from ModelSim Software.
Generating an example vcd file in Modelsim:

  1. Compile using Compile...Compile All. You should see message # Compile of testbench.v was successful.
    (assumes that you are using the example from the Using Modelsim page)
  2. Chose Simulate...Start Simulation and in the dialog box navigate to work...testbench.v
  3. At the Modelsim> command line choose the signals that should be in the vcd file.
    To add all the signals from the DDS unit:
    vcd add testbench/DUT/*
  4. Choose Simulate...Run...Run 100.
  5. At the Modelsim> command line, type quit -sim (or use the End Simulation menu item) to close the vcd file.
  6. The resulting data is written into the file dump.vcd, in the project directory.

A small example (no HPS, no Qsys) was compiled in Quartus, and also simulated in Modelsim to produce a vcd file. Using just the default settings for the PowerPlay software (no vcd file, use vectorless estimate) yields a dynamic core power of 0.29 milliwatts, with 44 mW i/o. Using the vcd file, and realistic transition rates (GUI) gives a power of 0.54 milliwatts, with 757 mW i/o.

Power Measurement

The DE1-SoC board does not ship with current measurement capability. The schematic and users manual suggests several ways of measuring power:



DE1-SOC literature list


Copyright Cornell University March 14, 2018