DE1-SoC: ARM HPS Linux
Cornell ece5760

The programming model I wish to use in ece5760 is LINUX running on the ARM processors, talking to hardware on the FPGA through Qsys.
I would prefer not to use design automation tools, like OpenCL, but stay at the level of the Qsys module interconnect, with custom FPGA hardware.

Standalone programming of HPS using native GCC in UP linux.

Segfaults and undefined memory accesses

We are going to be accessing the FPGA through a memory map mechanism in C. FPGA real memory addresses are converted to virtual addresses by a mmap Linux utility. If you try to access an FPGA address which has not been mapped to virtual memory, the system will segfault. This requires coordination between Qsys and the C program. A separate kind of failure occurs if you access a memory address for which you have not built hardware on the Qsys bus. In this case, the bus hangs, waiting forever for a response, and LInux crashes. To fix this you have to reboot.

Setting up the UP Linux environment:

 


References:

DE1-SOC literature list

Using the DE1-SOC FPGA by Ahmed Kamel

Stereoscopic Depth on an FPGA via OpenCL by Ahmed Kamel and Aashish Agarwal

Running Linux on DE1-SOC by MANISH PATEL and SYED TAHMID MAHBUB

OpenCL on DE1-SOC Sahil P Potnis (spp66@cornell.edu) Aashish Agarwal (aa2264@cornell.edu) Ahmed Kamel (ayk33@cornell.edu)

Audio Core (Qsys University Program 15.1) local copy

Video Core (Qsys University Program 15.1) local copy

External to Avalon Bus Master (external here means in the FPGA, but not in the Qsys bus structure)

Avalon to External Bus Slave (external here means in the FPGA, but not in the Qsys bus structure)

(old LINUX image)


Copyright Cornell University October 29, 2020