ECE 5760 deals with system-on-chip and embedded control in electronic design. The course is taught by Bruce Land, who is a staff member in Electrical and Computer Engineering. ECE 5760 thanks ALTERA for their donation of FPGAs and development hardware and TERASIC for donations and timely technical support of their hardware.
Final Projects | Assignments | Staff and Schedule | Links | Lectures (2011)
Assignments Lab exercises | Reading
Lab Assignments
- 1. Cellular automaton (weeks of Feb 1, 8)
- 2. Hardware ODE solver with Nios control (weeks of Feb 15, 22, 29)
- 3. Multiprocessor PDE realtime synthesis of a nonlinear drum (week of March 7, 14)
- 4. Mandelbrot Set (weeks of Mar 21, April 4)
- 5. Final Project (weeks April 11 to May 9)
Old lab assignments, ideas for labs
Lectures (2011) and Final projects
Reading Assignments
- All semester:
- Week of Jan 21:
- QuartusII tutorial for Verilog
- SOPC examples: Altera Design Contest winners (pdf)
- Review Synthesizable Verilog syntax from one of the links below, possibly Synthesis Methodology
- Download and inspect the contents of the DE2 CDROM zip version 1.5 (Altera link)
- Text Chapters 1-5 introduces the DE2 and FPGA
- Text Chapters 7-8 reviews Verilog and state machines
- Week of Jan 28
- DE2 hardware examples
- SRAM data sheet
- VGA DAC data sheet
- Text Chapter 10 VGA
- Text Chapter 15-17
- Week of Feb 4
- Pancake stack machine
- Nios II Software Developer's Handbook chapters 1-4, and 6.
- SOPC builder tutorial
- SDRAM tutorial
- Week of Feb 11
- NiosII. Read enough so that you will know exactly where to find the data you need. I suggest Nios II Processor Reference Handbook chapters 1-4, and 8.
- NiosII basic computer system
- NiosII tutorial
- Terasic NiosII HW/SW examples
- Week of Feb 18
- Week of Feb 25
Schedule and Staff Schedule | Staff
- Lecture: MWF 1220-1310 Location: PHL 407
- Lab Section: Thursday or Friday, 1330-1630, 238 Phillips
-
- Bruce
Land, BRL4@cornell.edu, 214 Phillips 255-7994
- TA:
Shiva Rajagopal- svr24
Links Cornell | Altera | NiosII | NiosII RTOS | CPU/COREs | Verilog | Design
- Cornell staff maintained pages
- Final Projects and some ideas and other project locations
- DE2 hardware and processor examples (excluding NiosII)
- FPGA memory
- Stack CPU
- NiosII assembler examples
- NiosII GCC examples
- NiosII MicroC/OS examples
- FPGA as an Digital Differential Analyzer (Analog Computer)
- Neural Models on the FPGA
- DSP on FPGA
- Simple Floating Point hardware
- VGA examples --
- NTSC Video
- Stocastic Chemical Reactions (hackaday)
- Using ModelSim
The Quick and Dirty Guide to Using ModelSim with Quartus -- by Julie Wang 2014 - TimeQuest and *.sdc files
- ------DE2-115 --------------
- DE2-115 top level, pin connections and DE2-115-640x480.zip
- Using SDRAM
- ----- DE1-SOC --------------
- DE1-SOC literature
- Experimenting with DE1-SOC
- ----- Student DE1-SOC ------
- Linux on DE1-SOC MANISH PATEL and SYED TAHMID MAHBUB
- DE1-SOC Evaluation Ahmed Kamel
- Altera University Program
- ALTERA Literature and DE2 resources
- QUARTUS II design software
- VERILOG in QUARTUS II, Simulation, Timing, SignalTap
- Memory Init File (mif) format
- Advanced Synthesis Cookbook
- Recommended HDL style
- Reocomended design practice: chapter 11
- HDL Design Guidelines: 11-3
- Inferring RAM memory: page 12-8
- Inferring ROM memory: 12-27
- Inferring shift-registers: 12-30
- Inferring multipliers: 12-3
- Tristate devices -- Do not use for internal signals. 12-41
- Unintential Latches: 12-37
- System on a programmable chip (SOPC) builder
- Megafunctions
- DE2 prototype board
- DE2 CDROM zip version 1.5 (Altera link)
- DE2 datasheets
- DE2_CCD camera CDROM
- Video input to VGA display project
- PIN assignment csv file
- Top level Verilog shell
- John Loomis, DE2 utilities from University of Dayton
- DE2 resources (Hamblen, GATech)
- DE2 tutorials and exercises
- NiosII
- CycloneII FPGA specs, details
- Other courses using Altera for SOPC
- GeorgiaTech, Hamblen, instructional materials
- UIUC ECE598 SOC
- John Loomis, DE2 utilities from University of Dayton
- UMass Amherst ECE354
- NiosII Operating systems and Languages
- lcc, the retargetable C compiler
- Nios microCLinux and Wiki
- MicroC/OS RTOS
- Book by Labrosse
- on NiosII
- Nios source code (NOT NiosII)
- introduction (Tei-Wei Kuo, National Taiwan University)
- introduction Zworld
- API summary and another summary
- Complete API
- RTOS introduction (KTH)
- KROS Real-Time Suite for the Altera Nios
- RTEMS Wiki and home page
- FreeRTOS Wiki and home page
- HAL introduction (KTH)
- newlib C-library
- CPU and IP cores
- opencores.org
- fpgacpu.org and links
- Floating point (HMC)
- One Instruction machines
- P-URISC one instruction ISA and VHDL
- Ultimate RISC
- Six different machines
- Wikipedia
- Stack machines and FORTH
- Sandpiper Technology
- Minimal stack CPU (Brad Rodriguez)
- b16 processor (Bernd Paysan)
- WISC CPU/16 (Koopman) Stack Computers
- Stack Computers and FORTH (koopman publications)
- FORTH hardware (Jason Woof)
- FORTH interest group
- Writing FORTH (Richard W.M. Jones)
- Homebrew stack CPU in an FPGA
- c18 colorFORTH and c18 multicore emulator
- Intellasys
- Evaluation of Synthesizable cores
- Microarchitecture of FPGA based soft processors
- Soft Core Processors and Embedded Processing: a survey and analysis
- A Study of the Speedups and Competitiveness of FPGA Soft Processor
- RISC16 (Bruce Jacob, UMD)
- WISC-SP06 (CS/ECE552 Wisconsin)
- DLX/MIPS ( Trinity College Dublin, Jeremy Jones )
- DLXview (Purdue)
- System-on-chip (Jan Gray)
- Synthesizable MIPS core in verilog (MIT SCALE group)
- MIPS core (Lafayette, ECE313)
- Kraken 16-bit RISC (Stanford) and other past projects
- 16-bit RISC (ECE813 MSU)
- DFT IP generator (CMU, Peter A. Milder for the SPIRAL Project )
- Software radio (Altera)
- Software radio (Virginia Polytech, John C. Davies IV)
- AIZUP 8-bit core (FCCM 1996) 1998 datapath and VHDL: single cycle, fetch/execute, pipelined, plus assembler def
- Eclectic list of computer architectures David Cary
- FPGApple
- FPGA for Fun -- Digital Scope
- RetroMicro FPGA
- CD16 soft CPU
- EE475 (my 1998 version)
- Verilog
- verilog.org
- verilog.net
- verilog.com and IEEE standard
- Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill! (Cliff Cummings)
- Synthesizable Verilog Examples
- Verilog manual (CSCI320, Bucknell)
- Verilog and logic lectures (MIT, Nathan Ickes and Rex Min)
- Blocking/nonblocking assignments
- Verilog tutorial (asic-world)
- Intro to Verilog (msstate, Reese)
- Reference manual ( Rajeev Madhavan, Automata Publishing )
- Quick Reference (Sutherland HDL)
- Verilog synthesis methodology (Finbarr O’Regan (finbarr@ee.ucd.ie))
- Verilog HDL coding (Freescale)
- Testbench Primer (Lattice)
- Altera Design Examples
- Binary to BCD converter
- General design information
- Proverbs and quotations
- It’s Time to Stop Calling Circuits “Hardware”
- John Kent's FPGA page
- fpgacpu.org and links
- fpga arcade
- fpga4fun
- Teaching with FPGAs (Edwards, Columbia) glossy version: student projects 2007, 2005, 2004 and 2007 class
- DSP/math
- Video/Graphics
- Video Chips
- Using the MC6847 Video Controller (MIT)
- MC6847 data sheet
- ELM data sheet
- NTE879 RGB encoder
- SAA1101 synch generator
- TDA8501 PAL/NTSC encoder
- MC13077 encoder
- AD722 encoder
- LM1881 sync separator (national) and EL1881 synch separator (intersil)
- TV tutorials
- TinyGL graphics
package
- Analog, Analog to Digital, and D to A
- Practical Analog Design (from Circuit Cellar)
- Guide to instrumentation amplifier design (analog devices)
- Single power supply opamp circuits (TI)
- Micropower circuts (Linear Technology)
- Single supply amplifier (EDN)
- Discover Circuits
- Analog-input circuit serves any microcontroller (EDN magazine12/20/2001)
- National Semiconductor
- Texas Instruments
- Dallas Semiconductor/Maxim
- Field-programmable Analog Arrays (FPAA)
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